[1] Gerez, S.H., "Algorithms for VLSI Design Automation", John Wiley and Sons, Chichester, (1999).

[1] Gerez, S.H., "Local Wire Routing by Stepwise Reshaping", Ph.D. Thesis, University of Twente, Faculty of Electrical Engineering, (December 1989). [2] Gerez, S.H., "Minimization and Layout Generation Algorithms for Random Logic", M.Sc. Thesis, University of Twente, Department of Electrical Engineering, (November 1984).

[1] Bruintjes, T.M., K.H.G. Walters, S.H. Gerez, B. Molenkamp and G.J.M. Smit, "Sabrewing: A Lightweight Architecture for Combined Floating- Point and Integer Arithmetic", ACM Transactions on Architecture and Code Optimization, Vol. 8(4), (January 2012). [2] Bazen, A.M. and S.H. Gerez, "Fingerprint Matching by Thin-Plate Spline Modelling of Elastic Deformations", Pattern Recognition Letters, Vol. 36(8), pp 1859-1867, (August 2003). [3] Bazen, A.M. and S.H. Gerez, "Systematic Methods for the Computation of the Directional Field and Singular Points of Fingerprints", IEEE Transactions on Pattern Analysis and Machine Intelligence, Vol. 24(7), (July 2002). [4] Heemstra de Groot, S.M., S.H. Gerez and O.E. Herrmann, "Range- Chart-Guided Iterative Data-Flow-Graph Scheduling", IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, Vol. 39(5), pp 351-364, (May 1992). [5] Gerez, S.H., S.M. Heemstra de Groot and O.E. Herrmann, "A Polynomial-Time Algorithm for the Computation of the Iteration- Period Bound in Recursive Data-Flow Graphs", IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, Vol. 39(1), pp 49-52, (January 1992). [6] Gerez, S.H. and O.E. Herrmann, "Switchbox Routing by Stepwise Reshaping", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 8(12), pp 1350-1361, (December 1989). [7] Spaanenburg, L., M. Beunder, F.A. Beune, S.H. Gerez, B. Holstein, R.C.C. Luchtmeijer, J. Smit, A. van der Werf and H. Willems, "MOD/R: A Knowledge Assisted Approach towards Top-Down only CMOS VLSI Design", Microprocessing and Microprogramming, The Euromicro Journal, Vol. 16(2&3), pp 83-88, (September/October 1985).

[1] Gerez, S.H., "Ontwerptraject Digitale IC's", (in Dutch), In: Leerdam, H.S. van, R.P. Mertens, A.J.M. Montagne and G.A. Schwippert (Eds.), Poly-Elektronica Zakboek, Derde geheel herziene en geactualiseerde druk, Reed Business, pp C4/1-C4/58, (2007). [2] Bazen, A.M., R.N.J. Veldhuis and S.H. Gerez, "Hybrid Fingerprint Matching using Minutiae and Shape", In: M. Sarfraz (Ed.), Computer Aided Intelligent Recognition Techniques and Applications, John Wiley and Sons, pp 119-130, (2005). [3] Bazen, A.M. and S.H. Gerez, "Achievements and Challenges in Fingerprint Recognition", In: D. Zhang (Ed.), Biometric Solutions For Authentication in an E-World, Kluwer Academic Publishers, Boston, (2002). [4] Gerez, S.H., S.M. Heemstra de Groot, E.R. Bonsma and M.J.M. Heijligers, "Overlapped Scheduling Techniques for High-Level Synthesis and Multiprocessor Realizations of DSP Algorithms", In: J.C. Lopez, R. Hermida and W. Geisselhardt (Eds.), Advanced Techniques for Embedded System Design and Test, Kluwer Academic Publishers, pp 125-150, (1998). [5] Smit, J., B.J.F. van Beijnum, S.H. Gerez and R.J. Mulder, "Proving Correctness of Digital Designs in the Multidimensional Design Space", In: D. Borrione (Ed.), From HDL Descriptions to Guaranteed Correct Circuit Designs, North Holland, Amsterdam, pp 71-88, (1987). [6] Smit, J., O. Herrmann, S. Gerez, R. Luchtmeijer, R. Mulder and L. Spaanenburg, "Syntactic and Semantic Definition of MoDL", In: P. Dewilde (Ed.), The Integrated Circuit Design Book, Delft University Press, Delft, The Netherlands, (1986).

[1] Walters, K.H.G., S.H. Gerez, G.J.M. Smit, G.K. Rauwerda, S. Baillou and R. Trauntner, "Multicore SoC for On-Board Payload Signal Processing", NASA/ESA Conference on Adaptive Hardware and Systems (AHS), pp 17-21, (July 2011). [2] Walters, K.H.G., A.B.J. Kokkeler, S.H. Gerez and G.J.M. Smit, "Low- Complexity Hyperspectral Image Compression on a Multi-Tiled Architecture", NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009, pp 330-335, (2009). [3] Hofstra, K.L. and S.H. Gerez, "Arx: A Toolset for the Efficient Simulation and Direct Synthesis of High-Performance Signal Processing Algorithms", International Conference on High Performance Embedded Architectures and Compilers, Ghent, Belgium, (January 2007). [4] Gerez, S.H. and J. de Zoeten, "A Conversion Tool for the Synthesis of SystemC Fixed-Point Data Types by the CoCentric SystemC Compiler", Synopsys User Group Conference, SNUG Europe, Munich, Germany, (May 2004). [5] Bazen, A.M. and S.H. Gerez, "Elastic Minutiae Matching by Means of Thin-Plate Spline Models", International Conference on Pattern Recognition, ICPR 2002, (August 2002). [6] Bazen, A.M. and S.H. Gerez, "An Intrinsic Coordinate System for Fingerprint Matching", 3rd International Conference on Audio- and Video-Based Biometric Person Authentication, Halmstad, Sweden, (June 2001). [7] Tangelder, R.J.W.T., H. De Vries, E.A.M. Klumperink, H. Snijders, H.G. Kerkhoff, J. Smit, S.H. Gerez and H. Speek, "Mixed-Signal Testing at the ASIC Design Course at Twente University", In: B. Courtois, N. Guillemot, G. Kamarinos and G. Stehelin (Eds.), Microelectronics Education, Kluwer Academic Publishers, Dordrecht, pp 205-208, (2000). [8] Tangelder, R.J.W.T., S.H. Gerez, H.G. Kerkhoff, E.A.M. Klumperink, J. Smit, H. Snijders, H. Speek and H. de Vries, "The ASIC Design Course at Twente", 2nd European Workshop on Microelectronics Education, Noordwijkerhout, The Netherlands, (May 1998). [9] Gerez, S.H. and E.G. Woutersen, "Assignment of Storage Values to Read-Write Memories", European Design Automation Conference with EURO-VHDL, EURO-DAC '96, pp 302-307, (September 1996). [10] Gerez, S.H. and E.G. Woutersen, "A High-Level Synthesis Tool for the Assignment of Storage Values to Sequential Read-Write Memories", IFIP TC 10 WG 10.5 International Workshop on Logic and Architecture Synthesis, Grenoble, pp 220-230, (December 1995). [11] Heemstra de Groot, S.M. and S.H. Gerez, "Static Scheduling of Multirate Iterative Data-Flow Graphs Using the Range-Chart Method", 4th Conference on Advances in Communications and Control, COMCON 4, Rhodes, Greece, pp 202-211, (1994). [12] Olah, A., S.H. Gerez and S.M. Heemstra de Groot, "Scheduling and Allocation for the High-Level Synthesis of DSP Algorithms by Exploitation of Data Transfer Mobility", International Conference on Computer Systems and Software Engineering, CompEuro 92, pp 145-150, (May 1992). [13] Smit, J., S.H. Gerez and R. Mulder, "Application of a Structured LISP System to Computer Algebra", In: J.H. Davenport (Ed.), EUROCAL '87, European Conference on Computer Algebra, Springer Verlag, Lecture Notes in Computer Science, no. 378, (1989). [14] Gerez, S.H. and O.E. Herrmann, "Packer: A Switchbox Router Based on Conflict Elimination by Local Transformations", International Symposium on Circuits and Systems, pp 961-964, (1989). [15] Gerez, S.H. and O.E. Herrmann, "CRACKER: A General Area Router Based on Stepwise Reshaping", International Conference on Computer-Aided Design, pp 44-47, (1989). [16] Smit, J., B.J.F. van Beijnum, S.H. Gerez, R.J. Mulder and L. Spaanenburg, "The MoDL Hardware Design System", In: M. Barbacci & C.J. Koomen (Eds.), CHDL 87, Computer Hardware Description Languages and Their Applications, Amsterdam, (1987). [17] Beijnum, B.J.F. van, Smit, J., Gerez, S.H. and Heemstra, S.M., "On Guaranteed Correct Digital Designs", In: W.E. Proebster and H. Reiner (Eds.), COMPEURO '87, pp 455-458, (May 1987).

[1] Walters, K.H.G., G.J.M. Smit and S.H. Gerez, "Discrete Wavelet Transform on Dynamically Reconfigurable Hardware", On-Board Payload Data Compression Workshop, Noordwijk, (June 2008). [2] Kampen, D. van, K.L. Hofstra, J. Potman and S.H. Gerez, "Implementation of a Combined OFDM-Demodulation and WCDMA- Equalization Module", Annual Workshop on Circuits, Systems and Signal Processing, ProRISC 2006, Veldhoven, The Netherlands, (November 2006). [3] Hofstra, K.L., S.H. Gerez and D. van Kampen, "A Language and Toolset for the Synthesis and Efficient Simulation of Clock-Cycle-True Signal-Processing Algorithms", 16th Annual Workshop on Circuits, Systems and Signal Processing, ProRISC 2005, Veldhoven, The Netherlands, (November 2005). [4] Kapoor, A., S.H. Gerez, F.W. Hoeksema and R. Schiphorst, "A Reconfigurable Tile-Based Architecture to Compute FFT and FIR Functions in the Context of Software-Defined Radio", 16th Annual Workshop on Circuits, Systems and Signal Processing, ProRISC 2005, Veldhoven, The Netherlands, (November 2005). [5] Kauffman, J.A., A.M. Bazen, S.H. Gerez and R.N.J. Veldhuis, "Grip- Pattern Recognition for Smart Guns", ProRISC Workshop on Circuits, Systems and Signal Processing, Veldhoven, The Netherlands, (2003). [6] Bazen, A.M. and S.H. Gerez, "Thin-Plate Spline Modeling of Elastic Deformations in Fingerprints", Third IEEE Benelux Signal Processing Symposium, SPS-2002, (2002). [7] Bazen, A.M. and S.H. Gerez, "Segmentation of Fingerprint Images", ProRISC 2001 Workshop on Circuits, Systems and Signal Processing, Veldhoven, The Netherlands, (November 2001). [8] Boer, J. de, A.M. Bazen and S.H. Gerez, "Indexing Fingerprint Databases Based on Multiple Features", ProRISC 2001 Workshop on Circuits, Systems and Signal Processing, Veldhoven, The Netherlands, (November 2001). [9] Bazen, A.M., M. van Otterlo, M. Poel and S.H. Gerez, "A Reinforcement Learning Agent for Minutiae Extraction from Fingerprints", Belgian-Dutch Conference on Artificial Intelligence (BNAIC'01), Amsterdam, (2001). [10] Bazen, A.M. and S.H. Gerez, "The Construction of an Intrinsic Coordinate System for Fingerprint Matching", 7th Annual Conference of the Advanced School for Computing and Imaging, Heijen, The Netherlands, (2001). [11] Meulen, P.G.M. van der, H. Schipper, A.M. Bazen and S.H. Gerez, "PMDGP: A Distributed Object-Oriented Genetic Programming Environment", 7th Annual Conference of the Advanced School for Computing and Imaging, Heijen, The Netherlands, (2001). [12] Bazen, A.M. and S.H. Gerez, "Extraction of Singular Points from Directional Fields of Fingerprints", Mobile Communications in Perspective, Annual CTIT Workshop, Enschede, The Netherlands, University of Twente, Center for Telematics and Information Technology, (February 2001). [13] Bazen, A.M. and S.H. Gerez, "Directional Field Computation for Fingerprints Based on the Principal Component Analysis of Local Gradients", ProRISC 2000 Workshop on Circuits, Systems and Signal Processing, Veldhoven, The Netherlands, (November 2000). [14] Bazen, A.M., G.T.B. Verwaaijen, S.H. Gerez, L.P.J. Veelenturf and B.J. van der Zwaag, "A Correlation-Based Fingerprint Verification System", ProRISC 2000 Workshop on Circuits, Systems and Signal Processing, Veldhoven, The Netherlands, (November 2000). [15] Meulen, P.G.M. van der, A.M. Bazen and S.H. Gerez, "A Distributed Object-Oriented Environment for the Application of Genetic Programming to Signal Processing", ProRISC 2000 Workshop on Circuits, Systems and Signal Processing, Veldhoven, The Netherlands, (November 2000). [16] Schiphorst, R., S.H. Gerez and C.H. Slump, "The Exploration of the Software-Defined Radio Concept by Prototyping Transmitter and Receiver Functions on a Digital Signal Processor", PROGRESS 2000 Workshop on Embedded Systems, Utrecht, The Netherlands, (October 2000). [17] Sindorf, S.L. and S.H. Gerez, "An Integer Linear Programming Approach to the Overlapped Scheduling of Iterative Data-Flow Graphs for Target Architectures with Communication Delays", PROGRESS 2000 Workshop on Embedded Systems, Utrecht, The Netherlands, (October 2000). [18] Bazen, A.M. and S.H. Gerez, "Computational Intelligence in Fingerprint Identification", 2nd IEEE Benelux Signal Processing Symposium, SPS-2000, Hilvarenbeek, The Netherlands, (March 2000). [19] Poiesz, P.W.G., S.H. Gerez and E.R. Bonsma, "Generation, Genetic Optimization and VHDL-Based Verification of Detailed Iterative Static Schedules for Multiprocessor Systems", ProRISC 10th Annual Workshop on Circuits, Systems and Signal Processing, Mierlo, The Netherlands, (November 1999). [20] Bonsma, E.R. and S.H. Gerez, "A Genetic Approach to the Overlapped Scheduling of Iterative Data-Flow Graphs for Target Architectures with Communication Delays", ProRISC Workshop on Circuits, Systems and Signal Processing, (November 1997). [21] Rem, F., S.H. Gerez, J. Smit, A. Heubi, M. Ansorge and F. Pellandini, "Power Estimation Techniques for the Purpose of the Architectural Synthesis of Digital Signal Processing Algorithms ", ProRISC Workshop on Circuits, Systems and Signal Processing, (November 1997). [22] Bonsma, E.R. and S.H. Gerez, "Overlapped Scheduling of Fine-Grain Iterative Data-Flow Graphs for Target Architectures with Communication Delays", 5th HCM BELSIGN Workshop, Dresden, Germany, (April 1997). [23] Woutersen, E.G. and S.H. Gerez, "Some Complexity Results in Memory Mapping", Third HCM BELSIGN Workshop, Corsica, (April 1996). [24] Woutersen, E.G. and S.H. Gerez, "The Application of Sequential Read-Write Memories in High-Level Synthesis", GRONICS '96: Groningen Information Technology Conference for Students, Groningen, The Netherlands, pp 93-100, (February 1996). [25] Gerez, S.H., M.L.M. de Jong and S.M. Heemstra de Groot, "Special- Case Techniques for the Efficient Computation of the Iteration- Period Bound in Multirate Data-Flow Graphs", ProRISC/IEEE Benelux Workshop on Circuits, Systems and Signal Processing, Mierlo, The Netherlands, pp 107-116, (March 1995). [26] Glentis, G.O. and S.H. Gerez, "Very High Speed Least Squares Adaptive Multichannel Filtering", ProRISC/IEEE Benelux Workshop on Circuits, Systems and Signal Processing, Mierlo, The Netherlands, pp 123-132, (March 1995). [27] Koster, M.S. and S.H. Gerez, "List Scheduling for Iterative Data- Flow Graphs", GRONICS '95, Groningen Information Technology Conference for Students, pp 123-130, (February 1995). [28] Beijnum, B.J.F. van and S.H. Gerez, "Mapping Boolean Functions onto Path-Driven Restoring Logic", ProRISC IEEE Benelux Workshop on Circuits, Systems and Signal Processing, Houthalen, Belgium, pp 127-134, (March 1993). [29] Heemstra de Groot, S.M., S.H. Gerez and H. Propitius, "Scheduling of Multirate Iterative Terminating and Nonterminating Processes Using the Range-Chart Method", ProRISC IEEE Benelux Workshop on Circuits, Systems and Signal Processing, Houthalen, Belgium, pp 63-70, (March 1993). [30] Herrmann, O.E., B.J.F. van Beijnum, S.H. Gerez, F. El-Hadidy, S. Heemstra de Groot, M. Janssens, J. Leenstra, J. Nijhuis, J. Smit, L. Spaanenburg and H. Speek, "A Wave Digital Filter Chip", In: O.E. Herrmann and B.J.F. van Beijnum (Eds.), Lecture Notes of the Nelsis Project, (1988). [31] Smit, J., S.H. Gerez and R.J. Mulder, "MoDL, a High-level Hardware Description Tool", Proceedings NGI-SION 1986, Stimulerende Informatica, Stichting Informatica Congressen, Amsterdam, pp 201- 212, (1986).

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